General

The Wombat5w is an expansion of Dale Skrien's Wombat5 machine. It adds more memory and widens the instructions from two bytes to three bytes to allow for 16 bit addresses. It also widens the values from 16 bits to 32 bits to allow for full Java ints. It adds a separate heap memory and some machine instructions to deal with the heap.

Since the machine is implemented virtually in Dale Skrien's CPUSim, this description is broken down by the components needed to define the machine in CPUSim.

Hardware Components

Registers

The machine uses these individual registers internally to do its computations and manage its state. They are not accessible to the assembly language program directly.

The ir (instruction register) is essentially the memory data register for the Main RAM (instructions).

I'll have to analyze what the frames look like.

RegisterWidthUse
abuffer116Holds 16 bit values for ALU computation
buffer132First operand for ALU computation and data transfer
buffer232Second operand for ALU computation
ir24Instruction register: holds each instruction for decoding
mar16Holds the address of a memory location to be accessed
mdr32Holds data being read from or written to memory
pc16Holds he address of the next instruction to be run
status3Status bits (only bit 0 used as halt bit)

There is no top register since register A7 now plays the role of the stack pointer.

Register arrays

There is one register array called A, with 8 general purpose registers, A0 through A7. Each is 32 bits wide. Register A7 now plays the role of the stack pointer. We shall use A6 as the frame pointer.

These registers are addressed by 3 bits in an instruction.

Condition bits

The only condition bit used is the halt bit (bit 0) of the status register, which the stop instruction sets to true. Arithmetic instructions also use it as their overflow bit, which stops the machine on an arithmetic overflow. Assembly language programs do not deal with this condition bit directly.

RAMs

There are three RAM areas. The sizes are in bytes.

NameSizePurpose
Main65536Holds code
Stack65536Holds the run-time stack
Heap65536Holds allocated objects

All of these have size 65536 bytes, addressable with 16 bits. Since each data word has 4 bytes, the Stack and Heap RAMs can each hold 16384 words. Since each instruction has 3 bytes, the Main RAM can hold 21845 instructions, with one byte left over. This should be enough for our test programs.

Microinstructions

The microinstructions are used to implement the machine instructions. A detailed understanding of them is not necessary to compile programs to the machine language.

EQUs

The CPUSim assembly language allows the use of name equivalences to represent numeric constants in a more understandable symbolic form. The Wombat4w defines equivalences for the array registers, allowing assembly code to represent them as A0 through A7 instead of 0 through 7.

The assembly language program can also define its own local EQUs, if desired.

Fetch sequence

The fetch sequence uses microinstructions to load and decode (run) the next instruction. The assembly language program is not concerned directly with it.

Machine instructions

A negative field size indicates a "don't care" field.

NameOpcodeFieldsDescription
stop 00 (000000)5 -19Set the halt bit to halt the machine
load 015 3 ; 16Load the contents of a fixed memory address in the Main RAM into one of the array registers
store 025 3 ; 16Store the contents of one of the array registers into a fixed memory address in the Main RAM
read 035 19Read from a fixed external channel into one of the array registers
write 045 19Write from one of the array registers to a fixed external channel
add 055 3 ; 16Add the contents of the array register specified by the second operand to the array register specified by the first operand
subtract 065 3 ; 16Subtract the contents of the array register specified by the second operand from the array register specified by the first operand
multiply 075 3 ; 16Multiply the contents of the array register specified by the second operand by the array register specified by the first operand
divide 085 3 ; 16Divide the contents of the array register specified by the second operand into the array register specified by the first operand
jump 095 19Jump unconditionally to the operand address of the instruction
jmpz 0A5 3 ; 16If the array register specified by the first operand is zero, jump to the second operand address of the instruction
jmpn 0B5 3 ; 16If the array register specified by the first operand is negative, jump to the second operand address of the instruction
move 0C5 3 ; 16Move the contents of the array register specified by the first operand to the array register specified by the second operand
push 0D5 19Pushes the value in a specified array register onto the stack
pop 0E5 19Pops the value from the top of the stack into a specified array register
call 0F5 19Save the program counter on top of the stack, then load the address in the instruction operand (9 bits) into the program counter to jump to it
return 10 (800000)5 -19Restore the program counter from the top of the stack and continue at that address
loads 115 3 ; 16Loads the contents of an address at the offset below the stack top that is the contents of the second operand into the array register specified by the first operand
stores 125 3 ; 16Stores the contents of the array register specified by the first operand at an address the offset below the stack top that is the value of the second operand
loadc 135 3 ; 16Loads the contents of the second operand, sign extended and right justified, into the array register specified by the first operand
loadi 145 3 ; 3 ; 13Loads the contents of the stack at the memory location at the address offset by the value of the third operand from the right half of the contents of the array register specified by the second operand into the array register specified by the first operand
storei 155 3 ; 3; 13Stores the contents of the array register specified by the first operand at the stack location at the address offset by the value of the third operand from the value in the right half of the array register specified by the second operand
loadh 1E5 3 ; 3 ; 13Loads the contents of the heap at an address offset by the value of the third operand from the contents of the array register specified by the second operand into the array register specified by the first operand
storeh 1F5 3 ; 3 ; 13Stores the contents of the array register specified by the first operand in the heap at an address offset by the value of the third operand from the contents of the array register specified by the second operand
inc 417 3 ; 14Add the contents of the second operand to the array register represented by the first operand
alloc 427 3 ; 14Place the current value of the heap pointer into the array register specified by the second operand, then allocate a new object by incrementing the heap pointer by the contents of the array register specified by the first operand

Note that the Wombat5w alloc instruction reverses the roles of the operands from the Wombat4w alloc.

Previous version of loadi and storei

A previous version of this machine did not have a fixed offset for the loadi and storei instructions. The instructions then looked like this.

NameOpcodeFieldsDescription
loadi 145 3 ; 16Loads the contents of the stack at the memory location at the address in the right half of the array register specified by the second operand into the array register specified by the first operand
storei 155 3 ; 16Stores the contents of the array register specified by the first operand at the stack location at the address in the right half of the array register specified by the second operand

Corrections

Corrections that need to be made:

  • Change microinstruction ir(11-23)->mar to ir(11-23)->mar(3-15)
  • Change mdr->ir to mdr(0-23)->ir (name change only)
  • Change mdr->pc to mdr(16-31)->pc (name and start bit)
  • Change pc->mdr to pc->mdr(16-31)
  • In fetch sequence, change mdr->ir to mdr(0-23)->ir (above change should fix this)
  • Add clear-mar to load and store
  • Change long opcodes to negative operand sizes
  • Review loads and stores


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