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The Wombat5w is an expansion of Dale Skrien's Wombat5 machine. It adds more memory and widens the instructions from two bytes to three bytes to allow for 16 bit addresses. It also widens the values from 16 bits to 32 bits to allow for full Java ints. It adds a separate heap memory and some machine instructions to deal with the heap.
Since the machine is implemented virtually in Dale Skrien's CPUSim, this description is broken down by the components needed to define the machine in CPUSim.
The machine uses these individual registers internally to do its computations and manage its state. They are not accessible to the assembly language program directly.
The ir (instruction register) is essentially the memory data register for the Main RAM (instructions).
I'll have to analyze what the frames look like.
| Register | Width | Use |
| abuffer1 | 16 | Holds 16 bit values for ALU computation |
| buffer1 | 32 | First operand for ALU computation and data transfer |
| buffer2 | 32 | Second operand for ALU computation |
| ir | 24 | Instruction register: holds each instruction for decoding |
| mar | 16 | Holds the address of a memory location to be accessed |
| mdr | 32 | Holds data being read from or written to memory |
| pc | 16 | Holds he address of the next instruction to be run |
| status | 3 | Status bits (only bit 0 used as halt bit) |
There is no top register since register A7 now plays the role of the stack pointer.
There is one register array called A, with 8 general purpose registers, A0 through A7. Each is 32 bits wide. Register A7 now plays the role of the stack pointer. We shall use A6 as the frame pointer.
These registers are addressed by 3 bits in an instruction.
The only condition bit used is the halt bit (bit 0) of the status register, which the stop instruction sets to true. Arithmetic instructions also use it as their overflow bit, which stops the machine on an arithmetic overflow. Assembly language programs do not deal with this condition bit directly.
There are three RAM areas. The sizes are in bytes.
| Name | Size | Purpose |
| Main | 65536 | Holds code |
| Stack | 65536 | Holds the run-time stack |
| Heap | 65536 | Holds allocated objects |
All of these have size 65536 bytes, addressable with 16 bits. Since each data word has 4 bytes, the Stack and Heap RAMs can each hold 16384 words. Since each instruction has 3 bytes, the Main RAM can hold 21845 instructions, with one byte left over. This should be enough for our test programs.
The microinstructions are used to implement the machine instructions. A detailed understanding of them is not necessary to compile programs to the machine language.
The CPUSim assembly language allows the use of name equivalences to represent numeric constants in a more understandable symbolic form. The Wombat4w defines equivalences for the array registers, allowing assembly code to represent them as A0 through A7 instead of 0 through 7.
The assembly language program can also define its own local EQUs, if desired.
The fetch sequence uses microinstructions to load and decode (run) the next instruction. The assembly language program is not concerned directly with it.
A negative field size indicates a "don't care" field.
| Name | Opcode | Fields | Description |
| stop | 00 (000000) | 5 -19 | Set the halt bit to halt the machine |
| load | 01 | 5 3 ; 16 | Load the contents of a fixed memory address in the Main RAM into one of the array registers |
| store | 02 | 5 3 ; 16 | Store the contents of one of the array registers into a fixed memory address in the Main RAM |
| read | 03 | 5 19 | Read from a fixed external channel into one of the array registers |
| write | 04 | 5 19 | Write from one of the array registers to a fixed external channel |
| add | 05 | 5 3 ; 16 | Add the contents of the array register specified by the second operand to the array register specified by the first operand |
| subtract | 06 | 5 3 ; 16 | Subtract the contents of the array register specified by the second operand from the array register specified by the first operand |
| multiply | 07 | 5 3 ; 16 | Multiply the contents of the array register specified by the second operand by the array register specified by the first operand |
| divide | 08 | 5 3 ; 16 | Divide the contents of the array register specified by the second operand into the array register specified by the first operand |
| jump | 09 | 5 19 | Jump unconditionally to the operand address of the instruction |
| jmpz | 0A | 5 3 ; 16 | If the array register specified by the first operand is zero, jump to the second operand address of the instruction |
| jmpn | 0B | 5 3 ; 16 | If the array register specified by the first operand is negative, jump to the second operand address of the instruction |
| move | 0C | 5 3 ; 16 | Move the contents of the array register specified by the first operand to the array register specified by the second operand |
| push | 0D | 5 19 | Pushes the value in a specified array register onto the stack |
| pop | 0E | 5 19 | Pops the value from the top of the stack into a specified array register |
| call | 0F | 5 19 | Save the program counter on top of the stack, then load the address in the instruction operand (9 bits) into the program counter to jump to it |
| return | 10 (800000) | 5 -19 | Restore the program counter from the top of the stack and continue at that address |
| loads | 11 | 5 3 ; 16 | Loads the contents of an address at the offset below the stack top that is the contents of the second operand into the array register specified by the first operand |
| stores | 12 | 5 3 ; 16 | Stores the contents of the array register specified by the first operand at an address the offset below the stack top that is the value of the second operand |
| loadc | 13 | 5 3 ; 16 | Loads the contents of the second operand, sign extended and right justified, into the array register specified by the first operand |
| loadi | 14 | 5 3 ; 3 ; 13 | Loads the contents of the stack at the memory location at the address offset by the value of the third operand from the right half of the contents of the array register specified by the second operand into the array register specified by the first operand |
| storei | 15 | 5 3 ; 3; 13 | Stores the contents of the array register specified by the first operand at the stack location at the address offset by the value of the third operand from the value in the right half of the array register specified by the second operand |
| loadh | 1E | 5 3 ; 3 ; 13 | Loads the contents of the heap at an address offset by the value of the third operand from the contents of the array register specified by the second operand into the array register specified by the first operand |
| storeh | 1F | 5 3 ; 3 ; 13 | Stores the contents of the array register specified by the first operand in the heap at an address offset by the value of the third operand from the contents of the array register specified by the second operand |
| inc | 41 | 7 3 ; 14 | Add the contents of the second operand to the array register represented by the first operand |
| alloc | 42 | 7 3 ; 14 | Place the current value of the heap pointer into the array register specified by the second operand, then allocate a new object by incrementing the heap pointer by the contents of the array register specified by the first operand |
Note that the Wombat5w alloc instruction reverses the roles of the operands from the Wombat4w alloc.
A previous version of this machine did not have a fixed offset for the loadi and storei instructions. The instructions then looked like this.
| Name | Opcode | Fields | Description |
| loadi | 14 | 5 3 ; 16 | Loads the contents of the stack at the memory location at the address in the right half of the array register specified by the second operand into the array register specified by the first operand |
| storei | 15 | 5 3 ; 16 | Stores the contents of the array register specified by the first operand at the stack location at the address in the right half of the array register specified by the second operand |
Corrections that need to be made:
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